ECE 550D: Fundamentals of Computer Systems and Engineering — Fall 2021

Class meeting times and location: TuTh 10:15–11:30AM and 1:45–3:00PM (2 sections) — Hudson Hall 125 and Wilkinson 130

Recitation meeting time and location: F 12:00–1:15PM — FITZPATRICK SCHICIANO B 1466

based on a diagram by Dr. Tyler Bletsch

Instructor: Dr. Rabih Younes
Duke e-mail: rabih.younes
Office hours: by appointment (link to make appointments posted on Sakai)
To provide anonymous feedback about anything related to the course, please follow this link (password posted on Sakai).

TAs: TA office hours (location: Hudson Hall 214):

Course Description

Fundamentals of computer systems and engineering for Master's students whose undergraduate background did not cover this material. Topics covered include: Digital logic, assembly programming, computer architecture, memory hierarchies and technologies, IO, and hardware implementation in HDL. Undergraduates may not take this course, and should take ECE 250D, ECE 353, and/or ECE 356 instead. Instructor: Younes. 3 units. Co-requisite: ECE 551D.

Learning Outcomes

Having successfully completed this course, the student will be able to:

Textbook and Other Course Material

Textbook not required. The suggested textbook is: David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 5th edition, Morgan-Kaufmann. (Amazon, AddAll) — (Not the "ARM" edition or the "Revised Printing").
All other material will be posted on Sakai. Slides will be posted before class time so that you can take notes on them if you would like to.

Grading Policy

Important Notes

***Extremely important advice:

We can only grade what we receive. Always check what you are submitting and make sure you submit the right files.

Contacting the instructor and the TAs:


Communications Support at Pratt

Graduate Communications and Intercultural Programs (GCIP) offers customized communications support for all graduate students at Pratt. They offer one-on-one coaching in the Graduate Communications Center (GCC) for all communications needs (e.g., academic writing, cover letters, presentations, pronunciation, master's theses/projects, PhD dissertations/publication/prelims). Additionally, GCIP offers a communication workshop series to help build specific communication skills throughout the academic year. Visit this link or email

Tentative Schedule

Week Date Topic Homework Project Checkpoints Recitation (Friday)
1 Tue 8/24 Syllabus + Intro
1 Thu 8/26 Transistors to Gates Quartus + Verilog Intro
2 Tue 8/31 Combinatorial Logic
2 Thu 9/2 Digital Arithmetic Adder
3 Tue 9/7 Digital Arithmetic
3 Thu 9/9 Storage, Clocking 1 due Multiplier
4 Tue 9/14 Finite State Machines Simple ALU (PC1) due
4 Thu 9/16 ISAs and MIPS FSM
5 Tue 9/21 ISAs and MIPS
5 Thu 9/23 ISAs and MIPS Full ALU (PC2) due Behavioral Verilog
6 Tue 9/28 Datapaths 2 due
6 Thu 9/30 FPGAs + Datapaths FPGA Board Intro
7 Tue 10/5 NO CLASS (Fall Break)
7 Thu 10/7 Clock Division + Exam Practice Problems 3 due Register File (PC3) due I/O Interfacing: PS2
8 Tue 10/12 Exam 1 Review
8 Thu 10/14 Pipelining Exam 1
9 Tue 10/19 Exam 1 Muddiest Points
9 Thu 10/21 Pipelining Work on processor
10 Tue 10/26 Memory Hierarchy Simple Processor (PC4) due
10 Thu 10/28 Memory Hierarchy I/O Interfacing: VGA
11 Tue 11/2 Memory Hierarchy
11 Thu 11/4 Memory Hierarchy Work on processor
12 Tue 11/9 Virtual Memory 4 due
12 Thu 11/11 Virtual Memory + Interrupts and Exceptions Q&A Session
13 Tue 11/16 OS 5 due
13 Thu 11/18 I/O + Exam 2 Review Full Processor (PC5) due Exam 2
14 Tue 11/23 NO CLASS
16 Fri 12/10 Final Project (PC6) Demo