Class Location and Hours
Class meets on TuTh 1:25–2:40pm in LSRC B101.
Recitations are held on Fridays (
11 sections).
Objectives
The objective of this course is to learn how computers work, focusing on how the computer hardware executes
the software.
The course focuses on: instruction sets, assembly language programming, basic digital logic design,
processor design, memory system design, and input/output.
Prerequisite: CompSci 201.
Instructor, Teaching Assistants, and Answering Questions
This is a very large class, which means that students should
contact other sources of information before, if necessary, contacting the
professor.
*The first option for finding help is this website.
*Then check the course's Canvas announcements.
*The third option for finding help is the Ed Discussion forum.
Questions there may get answered by a TA, a fellow classmate, or the professor.
*Please contact the professor only for those issues that cannot be handled by
anyone else.
TAs (
see office hours):
- Amir Ergashev (Head TA)
- Fletch Rydell (Head TA)
- Ananya Bhatia (Head TA)
- Aayush Kashyap
- Arnav Jindal
- Beth Lindenbaum
- Broden Murray
- Bo Chi
- Caroline Zhang
- Carson Brantley
- Diya Jain
- Esther Cheng
- Eva Aggarwal
- Evan Katz
- Hung Le
- Ishani Raha
- Ismael Diaz
- Marie Lowry
- Milena Prakapenka
- Nathanael Ren
- Paul Hletko
- Peter Crowley
- Wanghley Soares Martins
- William Harris
- Yuxuan (Alice) Chen
- Zachary Charlick
- Sanya Srivastava (Grad TA)
If you need to contact the professor, please email him or come to his office hours:
Instructor:
Dr. Rabih
Younes
Office: 210 Hudson Hall
Office Hours: TuTh 12:15–1:15 (starting week 2)
Duke e-mail: rabih.younes
Textbook and Other Course Material
Textbook not required, but highly recommended; all needed material will be posted on
Canvas.
Textbook: David A. Patterson and John L. Hennessy.
Computer
Organization and Design: The Hardware/Software Interface,
5th
edition, Morgan-Kaufmann.
Please do not get the "ARM" edition or
"RISC-V" edition or the "Revised Printing" -- for some
reason, the publisher has created several flavors of this book.
Duke Libraries have copies of this book available.
Grading Policy
Grade distrubution:
- Homework (45%).
- Midterm 1 (15%).
- Midterm 2 (15%).
- Final Exam (25%).
Late policy:
- 0-24 hours late: Take earned score and multiply by 0.9
- 24-48 hours late: Take earned score and multiply by 0.8
- >48 hours late: NO CREDIT
- Refer to Homework #1 for details, particularly with respect to
handling short-term incapacitation with automatic 48-hour extensions on homeworks.
- NO exceptions, NO extensions (except in case of dean's excuse)
Regrading policy: Regrade requests must be submitted no later than 5 days after the
assignment grade is released.
You must attend all exams (except in case of dean's excuse or sickness with STINF). There are no makeup
exams except in these situations.
Start assignments EARLY so that you don't get stuck at the end!
Grading schema (minimum %):
- 97: A+
- 93: A
- 90: A-
- 87: B+
- 83: B
- 80: B-
- 77: C+
- 73: C
- 70: C-
- 0: F
Misconduct
I will not tolerate academically dishonest work. This includes cheating on the homework and exams.
I will refer all suspected cases of cheating to Duke's Office of Student Conduct.
Refer to Homework #1, the
Duke Community
Standard, and the instructor if you have any questions about misconduct.
Tentative Schedule
Week |
Tue |
Thu |
Fri - Recitation |
Mon 1/6 |
|
Intro/Overview |
Using unix machine // HW1 (RULES) DUE
|
Mon 1/13 |
C prog |
C prog |
intro to writing C prog // HW2 (UNIX) DUE
|
Mon 1/20 |
C prog |
from C to binary |
C prog: pointers and mem |
Mon 1/27 |
from C to binary |
assembly // HW3 (C) DUE
|
asm prog: examples/SPIM |
Mon 2/3 |
assembly |
assembly |
asm prog: calling conventions |
Mon 2/10 |
combo logic |
seq logic |
review for midterm #1
|
Mon 2/17 |
MIDTERM #1
|
seq logic |
digital design & logisim // HW4 (ASM) DUE
|
Mon 2/24 |
datapath design |
exceptions/syscalls |
logisim for large projects |
Mon 3/3 |
mem hierarchies |
caches // HW5 (LOGIC) DUE
|
advanced logisim |
Mon 3/10 |
NO CLASS (Spring Recess) |
NO CLASS (Spring Recess) |
|
Mon 3/17 |
caches |
vmem |
review for midterm #2
|
Mon 3/24 |
MIDTERM #2
|
vmem |
cache/vmem examples |
Mon 3/31 |
i/o |
i/o // HW6 (CPU) DUE
|
cache/vmem examples |
Mon 4/7 |
pipelines |
pipelines |
pipeline examples |
Mon 4/14 |
pipelines |
multicore |
review for final // HW7 (CACHESIM) DUE
|
Mon 4/21 |
review for final
|
|
|
Mon 4/28 |
|
|
FINAL EXAM (@7pm)
|